数字前端设计工程师 50-75k·15薪
上海 5年以上 学历不限 招1人 8月14日更新
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职位介绍
美资公司上海研发中心,核心产品,平台及团队稳定,WLB,数字前端设计,要求RTL Coding能力强,有UVM验证或者Memory相关开发经验加分,英文口语能简单讲 Principal Design Engineer -- Memory Modeling Portfolio-上海 We are seeking passionate and skilled individuals to join our Memory Modeling R&D team, responsible for developing and maintaining system-level memory IP models used in hardware-based verification platforms. We are currently hiring for both Principal and Senior Principal levels. The final level will be determined based on the candidate’s experience, expertise, and overall fit for the role. Key Responsibilities  Responsible for scheduling, designing, developing, and supporting IP models of system level memory such as SDRAM (LPDDR, HBM), NAND Flash (ONFI/QSPI/OSPI), eMMC, SD Card, DFI, and UFS models for use on hardware based verification products.  Also responsible for updating, maintaining, documenting, and supporting existing system level memory model products.  Perform as individual contributor for RTL design, verification, productizing, and documentation of memory IP.  Interface with internal and external customers to work on diverse problems and solutions related to emulation, simulation, or verification.  Perform as team member toward cross verification of and cross training in memory IP as well as in developing and using lifecycle processes to ensure product quality. Job Requirements:  The position requires MSEE, or equivalent, with a minimum of 5 years significant experience in designing complex protocols and/or hardware systems.  MUST have excellent communication skills with both written and spoken English.  Fluent and extensive RTL design knowledge using Verilog/SystemVerilog is required along with experience using RTL verification tools and flows.  Must excel in and demonstrate solid debugging experience/skills.  Emotionally intelligent collaborator and communicator. Experience with team-wide collaboration tools and processes.  Drive and ability to schedule workload and plan own tasks effectively as well as coordinate with and adapt to other's needs and priorities when needful. Agile! Adaptive!  Verification experience using simulation and/or emulation products is a PLUS.  Programming experience with scripting languages like Perl, TCL, C-shell is a PLUS.  Experience in memory sub-system design and operation is a PLUS.
其他信息
语言要求:不限
行业要求:电气机械/器材

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更新时间:2026-08-14