岗位职责: Location: Shanghai 1.Responsible for digital module design and chip integration. 2.Responsible for module and chip verification. 3.Also responsible for module-level lint checking, timing checking and formal verification." 任职资格: 1.Proficiency in logic design, verification, synthesis and testing. 2.Proficiency in Verilog and its simulation environment. 3.Experience with low-power design. 4.Good knowledge of SOC design. 5.Experience in wireless communication or multimedia technologies is a plus. 6.Experience in ARM and AMBA design is a plus. 7.Experience in C_SHELL, TCL or PERL is a plus. 8.Experience in UVM, OVM or VMM is a plus. 9.Self-motivated and good team player."